FPGA Chip Recycling: Xilinx & Altera Residual Value Assessment for High-End Logic Chips

FPGA: The Programmable Premium Category in Chip Recycling

In the chip recycling industry, FPGAs (Field-Programmable Gate Arrays) occupy a unique position — they don't have the volume of MCUs or the extreme unit pricing of GPUs, but FPGAs are the only chip category that combines high per-unit residual value with strong secondary-use versatility. The reprogrammable nature of FPGAs means they can be flexibly reconfigured for different applications after retirement, yielding a secondary utilization rate far exceeding fixed-function ASICs. In 2026, AI accelerator cards deployed in data centers during 2020-2023, telecom base station signal processing boards, and industrial motion control cards are entering their retirement cycle — and the Xilinx Virtex / Kintex / Zynq and Intel/Altera Stratix / Arria FPGAs they carry are hitting the recycling market in volume.

The Core Logic of FPGA Recycling: Reprogrammability = High Residual

The recycling logic of FPGAs differs fundamentally from ASICs:

Dimension	ASIC (Fixed-Function)	FPGA (Programmable)
Secondary-use flexibility	Single scenario, non-reconfigurable	Reconfigurable, multi-scenario
Post-retirement residual rate	15-30% of original value	25-50% of original value
Spare-parts repair demand	Only for specific equipment	Cross-platform universal
Recycling premium	Baseline	1.5-3x same-gen ASIC
Export control impact	Minimal	High-end FPGAs under EAR control
Discontinuation premium	Limited	High (repair rigidity + supply cutoff)

The core value of FPGA recycling comes from the "reprogrammable" property — the same Virtex UltraScale+ VU9P that served as an AI training accelerator before retirement can be reconfigured as a 5G signal processor, an HFT (high-frequency trading) engine, or a video codec. This cross-scenario versatility creates a demand surface far broader than ASICs, driving recycling premiums of 1.5-3x.

Xilinx / Intel FPGA Recycling Reference Price Table

Current reference recycling prices for mainstream FPGAs (Reference Price (CNY), by brand, series, and model):

Brand	Series	Model	Price per piece	Notes
Xilinx	Virtex UltraScale+	VU9P	1,500-3,500	AI accelerator card mainstay, strongest demand
Xilinx	Virtex UltraScale+	VU13P	2,500-5,000	Ultra high-end, low volume, high price
Xilinx	Virtex UltraScale	VU440	800-1,500	Legacy high-end, prototyping
Xilinx	Virtex-7	VX690T	500-900	Discontinued, repair premium
Xilinx	Kintex UltraScale+	KU13P	600-1,000	Telecom/industrial mainstream
Xilinx	Kintex UltraScale	KU060	500-900	Value high-end
Xilinx	Zynq UltraScale+	ZU9EG	800-1,500	Embedded SoC, strong secondary use
Xilinx	Zynq UltraScale+	ZU19EG	1,200-2,200	High-capacity Zynq, scarce
Xilinx	Zynq-7000	ZC706	200-400	Mid-range, stable volume
Xilinx	Artix-7	XC7A100T	80-150	Entry-level, volume-driven
Intel/Altera	Stratix 10	GX 2800	2,000-4,000	Intel high-end, Virtex competitor
Intel/Altera	Stratix 10	GX 1100	1,000-2,000	Telecom/data center
Intel/Altera	Arria 10	GX 1150	300-600	Mid-high, industrial control
Intel/Altera	Cyclone 10	LP	30-60	Entry-level, volume-driven
Anlogic	PH1A series	—	20-50	Domestic high-end FPGA, growing
GOWIN	GW5A series	—	10-30	Domestic mid-range FPGA

Note: These are Q3 2026 reference ranges. Actual quotes depend on chip condition, package type (BGA/FBGA/LFBGA), License status, and batch size. Xilinx Virtex UltraScale+ holds firm pricing due to the AI accelerator card retirement wave; discontinued Virtex-7/Virtex-6 carry 200-400% discontinuation premiums due to rigid repair demand. Batches of 50+ pieces command a 5-10% premium.

Xilinx FPGA Series Positioning and Recycling Value Gradient

Xilinx (now under AMD) is the global FPGA leader. Its product line recycling values form a clear ladder from entry to flagship:

• Virtex UltraScale+ (Flagship): 16nm FinFET, used for AI training, HFT, 8K video codec. VU9P/VU13P are the core chips on data center AI accelerator cards — entering peak recycling in 2026 as Alveo series cards retire. Recycling at CNY 1,500-5,000/piece, the "ceiling" of FPGA recycling.
• Kintex UltraScale+ (High-end): 20nm/16nm, used in telecom base stations, industrial control, medical equipment. KU060/KU13P offer high cost-performance with broad secondary-use scenarios, recycling at CNY 500-1,000/piece.
• Zynq UltraScale+ (SoC): FPGA + ARM Cortex-A53/A72 integrated SoC, used in embedded vision, industrial control, automotive ADAS prototyping. The "programmable logic + hard-core processor" architecture gives ZU9EG/ZU19EG exceptionally high secondary-use value, recycling at CNY 800-2,200/piece.
• Artix-7 (Entry): 28nm, used in education, consumer electronics, low-end industrial. XC7A100T is the volume driver, recycling at CNY 80-150/piece.
• Spartan-7 (Ultra-entry): 28nm, the lowest-end product line, recycling at CNY 30-60/piece.

Intel/Altera FPGA Series Positioning and Recycling Value

Intel (formerly Altera) is the second-largest FPGA supplier. Its product line structure closely mirrors Xilinx:

Intel Series	Xilinx Counterpart	Typical Model	Price per piece
Stratix 10	Virtex UltraScale+	GX 2800 / SX 2800	CNY 2,000-4,000
Stratix 10	—	DX 2100 / NX 2100	CNY 1,500-3,000
Arria 10	Kintex UltraScale	GX 1150 / GT 1150	CNY 300-600
Cyclone 10	Artix-7	LP / GX	CNY 30-60
MAX 10	Spartan-7	10M series	CNY 10-25

Intel FPGAs have lower market share than Xilinx and relatively narrower spare-parts channels, but Stratix 10 high-end models have stable demand in data center and telecom. Intel FPGA recycling prices run 10-20% below Xilinx equivalents, though Stratix 10 GX 2800 sees stable recycling volumes due to Intel's telecom base station installed base.

Discontinued FPGAs: The Time-Premium Effect

Like MCUs, FPGAs exhibit a strong "discontinuation premium" — the more discontinued the high-end model, the more valuable it becomes, because large numbers of in-service equipment need repair parts while the original manufacturer has stopped supplying:

Model	Brand	Status	Price per piece	Discontinuation Premium
Virtex-6 (XC6VSX475T)	Xilinx	Discontinued 5+ years	CNY 200-500	200-400%
Virtex-7 (VX690T)	Xilinx	Discontinued 3+ years	CNY 500-900	150-300%
Stratix V (5SGXEA7)	Intel/Altera	Discontinued 4+ years	CNY 200-500	200-350%
Stratix IV (EP4SGX530)	Intel/Altera	Discontinued 6+ years	CNY 150-400	250-400%
Virtex-5 (XC5VFX130T)	Xilinx	Discontinued 7+ years	CNY 100-300	300-500%

These discontinued FPGAs have outdated process nodes, but because large numbers of telecom base stations, industrial equipment, and military systems are still in service, repair spare-parts demand is rigidly strong. Recyclers should prioritize building a discontinued FPGA part-number identification database to flag these high-premium models from telecom base station and industrial equipment teardowns.

FPGA Recycling: Testing and Pricing Key Points

FPGA recycling testing is more complex than MCU testing. Core dimensions:

• Package condition: FPGAs are primarily BGA/FBGA packaged. Solder-ball integrity directly affects recycling price. Factory tray + vacuum-packaged new units quote highest; teardown units require solder-ball deformation and pad damage inspection.
• JTAG boundary scan: Test the internal logic cell array via the JTAG interface to confirm whether the FPGA is functional. JTAG-passing FPGAs command a 50-100% premium over chips that cannot enter JTAG state.
• License/IP core status: High-end FPGAs may carry bound Licenses (e.g., Xilinx VITIS license) or encrypted IP cores. FPGAs with valid Licenses can premium 10-30%; however, chips with military/security-grade IP face circulation restrictions.
• Efuse/security settings: Some FPGAs have Efuse security burned in (e.g., Device DNA binding) — these cannot be reconfigured and suffer steep price discounts. Check Efuse status via Vivado/Quartus tools.
• Export control compliance: High-end FPGAs like Virtex UltraScale+ are under U.S. EAR export control (ECCN 5A001/3A001). Recycling and resale require end-user compliance verification. Recyclers must build an export-control screening process.

The core pricing logic for FPGAs is "model match + JTAG pass + License status", not generic performance parameters. Different models within the same series can vary 5-10x in recycling price.

FPGA Recycling Supply: Four Channels

• Data center AI accelerator card retirement: Xilinx Alveo series (U200/U250/U280) and AWS F1 instance cards retiring, carrying Virtex UltraScale+ VU9P/VU13P. Single-card recycling at CNY 3,000-8,000, with FPGA per-chip residual of CNY 1,500-5,000. The first wave of Alveo U200/U250 retirements has begun in 2026.
• Telecom base station retirement: 5G base station 4T4R/8T8R RF boards and baseband boards carry FPGAs (Stratix 10 / Kintex UltraScale). Per-board FPGA recycling value CNY 500-2,000 — large volumes but requiring batch processing.
• Industrial control equipment retirement: Motion control cards, machine vision cards, and high-end PLC modules carry Zynq/Arria series. Per-chip recycling at CNY 200-1,500, good quality but dispersed volume.
• OEM/solution provider dead stock: FPGA solution providers and end-OEM dead stock and engineering samples, circulating in factory tray packaging. Brand-new unused units quote 20-40% higher than teardowns.

Chinese FPGA Recycling Landscape

Chinese FPGAs still have low recycling market share, but growth is accelerating:

• Anlogic: PH1A / Elf series, mid-range FPGAs, recycling at CNY 20-50/piece. Primarily used in consumer electronics and industrial control.
• GOWIN Semiconductor: GW5A series, mid-to-low FPGAs, recycling at CNY 10-30/piece. IoT and consumer applications.
• Fudan Microelectronics: JFM series, recycling at CNY 15-35/piece. Primarily security and industrial.
• Pango Micro: Pango series, mid-range FPGAs, recycling at CNY 20-50/piece. Telecom and defense applications.

Current Chinese FPGA recycling volumes are small due to limited installed base and most being deployed in new equipment. By 2028, Chinese FPGAs are expected to rise from under 5% today to 10-15% of the recycling market — recyclers should build domestic FPGA part-number identification capability in advance.

Advice for Recyclers and Equipment Retirement Enterprises

• Data centers: Do not process retired Alveo U200/U250 accelerator cards as scrap boards. Per-card FPGA residual is CNY 3,000-8,000 — cards with Virtex UltraScale+ VU9P can reach 25-40% of original card value.
• Recyclers: Build JTAG boundary scan testing capability. JTAG-passing FPGAs command a 50-100% premium over undetectable chips — this is the "first gate" of FPGA recycling inspection.
• Track License status: High-end FPGAs with valid Xilinx/Intel Licenses can premium 10-30%. Always verify License binding status via Vivado/Quartus tools during recycling.
• Identify discontinued models: Virtex-6/7, Stratix IV/V and other discontinued FPGAs are actually worth more than newer-generation chips (repair-parts rigidity). Telecom base station and industrial equipment teardown boards frequently carry these high-premium discontinued FPGAs.
• Export compliance: High-end FPGAs like Virtex UltraScale+ are under EAR control. Recycling and resale must confirm the end-user is not on the Entity List. Recommend building a BIS-authorized self-check process to avoid compliance risk.
• Don't overlook SoC FPGAs: Zynq UltraScale+ series, with integrated ARM processors, has broader secondary-use scenarios than pure FPGAs (embedded vision, industrial control, automotive ADAS prototyping) — commanding 10-20% recycling premiums.

ChipReclaim has established professional FPGA recycling and JTAG testing capabilities, covering the full Xilinx range (Virtex / Kintex / Zynq / Artix / Spartan) and Intel/Altera range (Stratix / Arria / Cyclone / MAX), with particular expertise in high-end Virtex UltraScale+ License status detection and discontinued-model high-premium pricing. For data centers, telecom equipment vendors, industrial control enterprises, and OEM solution providers, we offer free assessments, JTAG testing, and top-market buyback — maximizing the residual value of your FPGA chips.